1. Field of the Invention
This invention relates to a ferroelectric memory device, more specifically a ferroelectric memory device capable of reading out stored data in a high-speed as well as saving electric power consumption.
2. Description of the Related Art
A ferroelectric memory device using a ferroelectric capacitor is known as an nonvolatile type semiconductor memory. A circuit diagram of a part of the ferroelectric memory is shown in FIG. 8. The ferroelectric memory comprises a ferroelectric capacitor 4 for memory (hereinafter referred to as memory ferroelectric capacitor 4) and a load capacitor 6. A hysteresis curve illustrated in FIG. 9 shows a relationship between voltages applied to the memory ferroelectric capacitor 4 (an electric potential at a bit line BL when an electric potential detected at a plate line PL is used as a reference potential) and polarization state (in the drawing, "polarization state" is illustrated as "electric charge" which is equivalent to the polarization state).
It is assumed that a state which causes remanent polarization Z1 is referred to as first polarization state P1 (equivalent to stored data "High" in the memory ferroelectric capacitor 4), and a state which causes remanent polarization Z2 is referred to as second polarization state P2 (equivalent to stored data "low" therein). Storing data in the memory ferroelectric capacitor 4 can be read out by detecting polarization state thereof.
In order to detect polarization state of the memory ferroelectric capacitor 4, a divided voltage Vf generated between both ends of the memory ferroelectric capacitor 4 is measured when a read-out voltage Vp is applied to the plate line PL after making the bit line BL to floating state upon discharging the load capacitor 6 shown in FIG. 8.
According to a pictorial solution method shown in FIG. 9, the divided voltage Vf generated between both ends of the memory ferroelectric capacitor 4 becomes V1 when the memory ferroelectric capacitor 4 is in the first polarization state P1, and the divided voltage Vf becomes V2 when the capacitor 4 is in the second polarization state P2, in case of illustrating a capacitance of the load capacitor 6 with a gradient of a line L1. So that, polarization state of the memory ferroelectric capacitor 4 can be detected whether it is in the first polarization state P1 or in the second polarization state P2 by comparing the divided voltage Vf generated between both ends of the memory ferroelectric capacitor 4 during read-out operation and the reference voltage Vref in case of setting the reference voltage Vref as shown in FIG. 9.
It is preferred to have a larger difference in voltage between a voltage V1 and a voltage V2, because larger margin of detection can be obtained when the voltage difference becomes larger. Voltage difference .DELTA.V between the voltage V1 and the voltage V2 varies depending on voltage/charge characteristics of the memory ferroelectric capacitor 4 and voltage/charge characteristics of the load capacitor 6. FIG. 10 shows a graph illustrating a relationship between the capacitance (voltage/charge characteristics) of the load capacitor 6 and the voltage difference .DELTA.V when voltage/charge characteristics of the memory ferroelectric capacitor 4 is fixed to a certain value.
In the conventional ferroelectric memory device, a capacitance C0 (C0.apprxeq.5 pF in FIG. 10) of the load capacitor 6 is set so as to maximize the voltage difference .DELTA.V. To do that, larger margin of detection can be obtained.
However, the conventional ferroelectric memory device described in above has following problems to be resolved. The relationship illustrated in FIG. 10 is plotted based on a condition of applying a read-out voltage Vp to the plate line PL for infinite time. So that, the capacitance C0 of the load capacitor 6 is set in accordance with the condition.
Although, the condition shown in FIG. 10 is set as infinite time period, actual time period for applying the read-out voltage Vp has a definite period of time period. It is uncertain whether or not the capacitance C0 being set as described in above can provide the maximum value of the voltage difference .DELTA.V against an actual read-out time period.
Also, the shorter period of application of the read out-voltage Vp, the less voltage difference .DELTA.V is made. So that, detection of stored data can be done easily when the read-out voltage Vp is applied for relatively longer time period because larger voltage difference .DELTA.V is maintained. On the contrary, there is slight difficulties in detection of stored data when the read-out voltage Vp is applied for shorter time period because less voltage difference .DELTA.V is maintained. As a result, read-out operation of the conventional ferroelectric memory device can not be done in a high-speed. Further, a larger amount of electric power consumption is required (see FIG. 11, electric power consumption of the device will be described later)